10-13 NOV 2026 · Munich, Germany

MEET FIXCHIPS (C3-161) AT electronica 2026

NXP Semiconductors LPC865M201JHI48/0E

NXP Semiconductors LPC865M201JHI48/0E electronic component product image

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Manufacturer
Manufacturer No
LPC865M201JHI48/0E
Quantity
10
Availability
In Stock
Package
HVQFN EP
Packaging
Tray
Description
MCU 32-bit ARM Cortex M0+ RISC 64KB Flash 3.3V 48-Pin HVQFN EP Tray
Payment
PayPalEast West BankVISAMastercardWestern Union
Delivery
DHLFedExUPSTNT
AS9120
ISO 13485
ERAI Member
VDE
ISO 9001
ISO 14001
Five-Star After-Sales Service Certification
Bavarian Chips Alliance
UKAS Management Systems
ANAB ISO/IEC 17021
IAF
CAN
0
HTS
8542.31.00.25
I2C
1
I2S
0
PWM
10
SPI
2
USB
0
PPAP
No
SVHC
Yes
UART
3
USART
3
EU RoHS
Compliant
Ethernet
0
Mounting
Surface Mount
RAM Size
8KB
ECCN (US)
3A991a.2.
Packaging
Tray
Pin Count
48
Automotive
No
Device Core
ARM Cortex M0+
Family Name
LPC800
PCB changed
48
ADC Channels
12
Availability
No Stock Available
No. of Timers
4
Package Width
7
Interface Type
I2C/I3C/SPI/USART
Number of ADCs
1
Number of I/Os
42
Package Height
0.83
Package Length
7
Programmability
Yes
Supplier Package
HVQFN EP
Core Architecture
ARM
Program Memory Size
64KB
Program Memory Type
Flash
ADC Resolution (bit)
12
Data Bus Width (bit)
32
Standard Package Name
QFN
Manufacturer Lead Time
30 weeks
Maximum CPU Frequency (MHz)
60
Instruction Set Architecture
RISC
Maximum Clock Frequency (MHz)
60
Maximum Power Dissipation (mW)
1120
Maximum Operating Temperature (°C)
105
Minimum Operating Temperature (°C)
-40
Maximum Operating Supply Voltage (V)
3.6
Minimum Operating Supply Voltage (V)
1.8
Typical Operating Supply Voltage (V)
3.3
AttributeValue
CAN0
HTS8542.31.00.25
I2C1
I2S0
PWM10
SPI2
USB0
PPAPNo
SVHCYes
UART3
USART3
EU RoHSCompliant
Ethernet0
MountingSurface Mount
RAM Size8KB
ECCN (US)3A991a.2.
PackagingTray
Pin Count48
AutomotiveNo
Device CoreARM Cortex M0+
Family NameLPC800
PCB changed48
ADC Channels12
AvailabilityNo Stock Available
No. of Timers4
Package Width7
Interface TypeI2C/I3C/SPI/USART
Number of ADCs1
Number of I/Os42
Package Height0.83
Package Length7
ProgrammabilityYes
Supplier PackageHVQFN EP
Core ArchitectureARM
Program Memory Size64KB
Program Memory TypeFlash
ADC Resolution (bit)12
Data Bus Width (bit)32
Standard Package NameQFN
Manufacturer Lead Time30 weeks
Maximum CPU Frequency (MHz)60
Instruction Set ArchitectureRISC
Maximum Clock Frequency (MHz)60
Maximum Power Dissipation (mW)1120
Maximum Operating Temperature (°C)105
Minimum Operating Temperature (°C)-40
Maximum Operating Supply Voltage (V)3.6
Minimum Operating Supply Voltage (V)1.8
Typical Operating Supply Voltage (V)3.3

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