Integrated Device Technology R5F51114ADFL#3A
Image is only for reference
| Attribute | Value |
|---|---|
| CAN | 0 |
| HTS | 8542.31.00.01 |
| I2C | 1 |
| I2S | 0 |
| PWM | 1 |
| SPI | 1 |
| USB | 1 |
| PPAP | No |
| UART | 0 |
| USART | 0 |
| EU RoHS | Compliant |
| Ethernet | 0 |
| Mounting | Surface Mount |
| RAM Size | 16KB |
| ECCN (US) | 3A991.a.2 |
| Packaging | Tray |
| Pin Count | 48 |
| Automotive | No |
| Lead Shape | Gull-wing |
| Device Core | RX |
| Family Name | RX |
| PCB changed | 48 |
| ADC Channels | 10 |
| Availability | No Stock Available |
| No. of Timers | 7 |
| Package Width | 7 |
| Interface Type | I2C/SPI/USB |
| Number of ADCs | 1 |
| Number of I/Os | 30 |
| Package Height | 1.4 |
| Package Length | 7 |
| Programmability | Yes |
| Real Time Clock | Yes |
| Data Memory Size | 8KB |
| Supplier Package | LFQFP |
| Core Architecture | RX |
| Program Memory Size | 96KB |
| Program Memory Type | Flash |
| ADC Resolution (bit) | 12 |
| Data Bus Width (bit) | 32 |
| Parallel Master Port | No |
| Standard Package Name | QFP |
| Number of Watchdog Timers | 1 |
| Maximum CPU Frequency (MHz) | 32 |
| Instruction Set Architecture | CISC |
| Maximum Expanded Memory Size | 4GB |
| Maximum Clock Frequency (MHz) | 32 |
| Maximum Power Dissipation (mW) | 300 |
| Maximum Operating Temperature (°C) | 85 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Supply Voltage (V) | 3.6 |
| Minimum Operating Supply Voltage (V) | 1.8 |
| Typical Operating Supply Voltage (V) | 3.3 |
Purchase & Inquiry
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Packaging Process
